6502 sim · phase 3 scaffold

switch-level transistor simulator. perfect6502 port; visual6502 data. cc-by-nc-sa.

ready

editor

registers

PC----
A--
X--
Y--
SP--
P--
flagsN V _ B D I Z C
cyc0

memory

load a program to view memory

narration

events drained from chip will appear here

die view